Technology

MCSP Advantages


The MCSP product is a true die size package, which is not true of many competing packages. Since only one substrate is required, the package compares favorably with others in thinness and weight. The MCSP product supports preprocessing of the substrate before wafer attachment, which enables the user to minimize interconnect traces and parasitics, therefore, increase operating speed. Some many competing products, such as do not support pad redistribution and limit the I/O signals to the same location as the IC pad locations. No competing technologies allow for thin-film deposition of passive components in such close proximity to the IC processor.

The products and services offered by MCSP have significant cost and technology advantages over the wafer- level CSP offerings of the competition. The MCSP technology uses fewer masks and has fewer manufacturing steps. Some competing CSP products utilize two glass substrates and no via's, whereas the MCSP product uses only one glass substrate with via's. Some competitive processes perform chip scale packaging at the die level, which results in significantly higher production cost unlike the MCSP process which performs all manufacturing at the wafer level. The MCSP product is inherently simpler to manufacture than competitive products and has a shorter manufacturing cycle time because of its wafer level processing and testing capabilities. Some processing steps, such as drilling vias, forming interconnect traces on the glass substrate and testing is performed prior to wafer attachment. This pre-processing of the glass substrate reduces the manufacturing cycle time, reduces cost, eases manufacturability and increases yield.

Furthermore, the MCSP product requires no special wafer processing and has fewer application restrictions. Several competing CSP products use the scribe area for metal deposition connecting IC pads to a glass redistribution layer. These competitive offerings are limited to peripheral interconnects, cannot be applied to wafers with process control monitor devices within the scribe area and are inherently limiting and yield restrictive. The MCSP technology does not limit design flexibility or use the scribe area for pad interconnections.

Overall, the MCSP product has competitive advantages in cost, size, cycle time and quality.

MCSP Product Benefits

The MCSP process creates a wafer-level chip scale package that will meet the performance and footprint requirements of present and future integrated circuit products. The following are some major benefits of the MCSP product.

  • Small Footprint: Package size is equal to the chip size. A MCSP package is smaller than current BGA or TSOP packages and smaller than most CSP packages. The area required for mounting on a PCB is reduced accordingly.
  • High Yield: The glass substrate can be pre-processed before attachment to a wafer. This reduces cycle time and increases packaging yield. Chip frequency performance can be accurately simulated and controlled because package parasitics can be predetermined before packaging and are very repeatable.
  • I/O Count: The package can be applied to both low I/O (input/output) and high I/O product applications. Extremely fine- pitch metal traces (as small as 15 micron) and small solder balls (<0.50-mm pitch) can be implemented on the glass substrate. The technology will allow for several hundred I/O's depending on die size
  • Electrical performance: The redistribution of die pads on the wafer to the pads on the substrate surface provides the shortest routing path to the next level of interconnect. Parasitic L (inductance), C (capacitance), and R (resistance) are reduced and signal integrity is improved.
  • Passive Components: Thin-film deposition of passive components (resistors and capacitors) on the glass sheet significantly shortens the trace distance, increasing speed and performance of the IC processor while reducing signal parasitics.
  • Optical Window: The glass can be used as a protective covering for fragile CMOS and MEMS device, as a culminating and diffraction grate for VCSEL applications or as a optical lenses for an array of applications.
  • Simple Process: No wafer preparation is necessary before lamination. The process uses finished wafers, with or without passivation, and can be applied to any wafer size and semiconductor process.
  • Low Cost: Production cost is lower than other CSP products. MCSP employs a well-documented and highly characterized semiconductor process using fewer manufacturing steps (nearly 1⁄2 current processing models) for enormous cost reductions.
  • High Reliability: The robust design and structure of MCSP results in high package reliability and quality levels. With minor process modifications, a hermetic package can be developed.